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Qual CI é equivalente ao 16f84 no proteus


charlesfrances

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Teria como ,obter outros microcontroladores na versão demo

pessoal agente só utiliza o 16f84 na versão demo ,

não quero só ficar no 16f84, alguem sabe com conseguir uma licença do

16f628 que já para um principiante como eu acho que já estou apto a dominalo

depois de treinar tanto no 16f84

Microcontroller_16_F628_A.jpg

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pois é fazer o que? :(

A licença do ISIS ,poxa vida rsrsr não acredito que só podemos usar este microcontrolador

então é melhor realmente os AVRs que são de graça :eek::zoio::zoio::zoio: kkkkkkkkkkkkkkk!

Claro, você consegue a licença aqui:

http://www.labcenter.com/ordering/general.cfm

:D

Falou

Matheus você que programa em C ,eu já mesmo estou achando a linguagem C ,acho

na verdade ela fascinante porque sei que mais e mais como esta se espandindo...

uns dizem que é difícil outros dizem que é fácil,eu escolhi a C achei ela bacana

mais para encerrar de uma vez esse topico , queria saber quanto de RPM

maximo consigo com o PIC16F84A - usando um-_-(_( Optoacoplador

sei la se tem limite ? talvez...

agradeço a Deus por existir a linguagem C :eek::eek: e de toda a palavra em codigo C

Valeu pessoal!!

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Charlesfrances,

Eu havia entendido mal, achei que a licença era para o compilador C ....

Olha, meu amigo, procure com carinho sobre o Proteus 7.10 , vai ver que existe muita informação para voce "baixar" e conhecer mais .....

Cesarlg,

O Proteus é um software comercial, tem de adquirir a licença para uso, igualmente qualquer outro software como o Windows ou um Office.

O Charlesfrances está usando a versão demo, que é muito limitada, ele gostaria de poder rodar outros microcontroladores....

Paulo

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aphawk ta certo então quer dizer que os antigos talvez tenha a licença liberada certo?

cesar se trata apenas dos terem mais funcinalidade que o 16f84, por exemplo o modulo de captura e o A/D :D

mais uma pergunta já que não responderam sobre optoacopladores que consigo encontrar no proteus, mais o sensor hall não consigo qual nome eu coloco para procurar:eek:

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atrapalhos acontece ... mais saberia realmente dizer boa quantidade significativa de microcontroladores no Proteus 7.10 agradecido!! que foi dito, e como acho o sensor Hall

talvez o proteus nem tenha ,senão já teria achado pelo nome ? marca, numero ?

** pessoal ta complicado de achar as coisas...:cool:

pra falar a verdade nem no youtube vi algum video relatando alguns exemplos de sensor hall... ai é dose vou dar uma procurada porai!!:muro::tantan:

Sensor hall é bacana se alguem souber ai beleza...:69:

existe aqueles de CD ROM tem um de tres pinos tambem igual a um transistor ...mais eu queria achar no proteus que nome coloco?:Baaa:

Vamos lá pessoal...

Aleluia se encontrar ...

como funciona este optoacoplador aguem saberia me explicar seu funcionamento em detalhes por favor!!! :joia::seila:

ou algum desenho amostrando seu funcionamento

naõ da pra visialisar direito neste video o seu formato do optoacoplador....(_(

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Curiosidade para complementar o tópico.

**Desculpe pelos textos em inglês. http://translate.google.com/

PICs suportados pela última versão completa do Proteus:

Família 10/12F:

PIC10F200, PIC10F202, PIC10F204, PIC10F206

PIC10F220, PIC10F222, PIC12C508A, PIC12C509A

PIC12HV752,PIC12LF1501

PIC12C671, PIC12C672, PIC12CE518, PIC12CE519

PIC12CE673, PIC12CE674, PIC12F510, PIC12F609

PIC12F615, PIC12F629, PIC12F675, PIC12F683

PIC12F1501, PIC12LF1501, PIC12F752, PIC12HV752

PIC12F1822, PIC12LF1822, PIC12F1840, PIC12LF1840

Pontos Positivos:

Fully simulates the entire instruction set.

Supports all port and other I/O pin operations including weak pullup.

Supports all timers including watchdog timer, sleep mode and wake-up from sleep.

Supports Analogue-to-Digital Conversion (ADC) module including support for voltage reference pins.

Supports the Analogue Comparator and Voltage Reference modules.

Supports internal code and data EEPROM memory inc. code protection and data persistence.

Supports all interrupt modes including pin change interrupts.

Supports the Complementary Output Generator (CWG) module in appropriate variants.

Supports the Configurable Logic Cell (CLC) module in appropriate variants.

Supports the Pulse Width Modulation (PWM) module in appropriate variants.

Supports the Numerical Controlled Oscillator (NCO) module in appropriate variants.

Supports the Complementary Waveform Generator (CWG) module in appropriate variants.

Internally generated processor clock for performance. Event timing accurate to one clock period.

Provides internal consistency checks on code (e.g. execution of invalid op-codes, illegal memory accesses, stack overflow checking, etc.).

Fully integrated in to the VSM source level debugging system.

Fully integrated into the Proteus Diagnostic Control System.

Pontos negativos:

No significant functional limitations.

HFINTOSC as CLC1 input is not supported for efficiency reasons.

Família 16F:

PIC16C61, PIC16C62B, PIC16C63A, PIC16C64A, PIC16C65B, PIC16C66

PIC16C67, PIC16C72A, PIC16C73B, PIC16C74B, PIC16C76, PIC16C77

PIC16F506, PIC16F610, PIC16HV610, PIC16F616, PIC16HV616, PIC16F627A

PIC16F628A, PIC16F630, PIC16F631, PIC16F648A, PIC16F676, PIC16F677

PIC16F684, PIC16F685, PIC16F687, PIC16F688, PIC16F689, PIC16F690

PIC16F716, PIC16F722A, PIC16F723A, PIC16F724, PIC16F726, PIC16F727

PIC16LF722A, PIC16LF723A, PIC16LF724, PIC16LF726, PIC16LF727

PIC16F785, PIC16HV785, PIC16F818, PIC16F819, PIC16F83

PIC16F84A, PIC16F87, PIC16F870, PIC16F871, PIC16F873, PIC16F873A

PIC16F874, PIC16F874A, PIC16F876, PIC16F876A, PIC16F877, PIC16F877A

PIC16F88, PIC16F882, PIC16F883, PIC16F884, PIC16F886, PIC16F887

PIC16F913, PIC16F914, PIC16F916, PIC16F917, PIC16F946

PIC16F1503, PIC16LF1503, PIC16F1507, PIC16LF1507, PIC16F1508

PIC16LF1508, PIC16F1509, PIC16LF1509

PIC16F1516, PIC16LF1516, PIC16F1517, PIC16LF1517, PIC16F1518

PIC16LF1518, PIC16F1519, PIC16LF1519

PIC16F1823, PIC16F1824, PIC16F1825, PIC16F1826, PIC16F1827, PIC16F1828

PIC16F1829, PIC16LF1823, PIC16LF1824, PIC16LF1825, PIC16LF1826, PIC16LF1827

PIC16LF1828, PIC16LF1829, PIC16F1933, PIC16F1934, PIC16F1936, PIC16F1937

PIC16F1938, PIC16F1939, PIC16LF1933, PIC16LF1934, PIC16LF1936, PIC16LF1937

PIC16LF1938, PIC16LF1939, PIC16F1946, PIC16F1947, PIC16LF1946, PIC16LF1947

PIC16F1503, PIC16F1507, PIC16F1508, PIC16F1509, PIC16F722A, PIC16F723A

PIC16F724, PIC16F726, PIC16F727

Pontos Positivos:

Fully simulates the entire instruction set.

Supports all port and other I/O pin operations.

Supports all timers including watchdog timer, sleep mode and wake-up from sleep.

Supports both Capture-Compare-PWM (CCP) modules in all modes and ECCP modules.

Supports Parallel Slave Port (PSP) module on appropriate devices.

Supports MSSP in both the SPI mode and the I2C master and slave modes.

Supports Analogue-to-Digital Conversion (ADC) module including support for voltage reference pins.

Supports Analogue Comparator modules including support for internal and external voltage references.

Supports USART in all modes and EUSART for appropriate variants.

Supports internal code and data EEPROM memory inc. code protection and data persistence.

Supports all interrupt modes.

Supports the LCD controller module in appropriate variants.

Supports the Configurable Logic Cell (CLC) module in appropriate variants.

Supports the Pulse Width Modulation (PWM) module in appropriate variants.

Supports the Numerical Controlled Oscillator (NCO) module in appropriate variants.

Supports the Complementary Waveform Generator (CWG) module in appropriate variants.

Supports the Ultra Low Power Wake Up module in appropriate variants.

Supports the Digital Signal Modulator (DSM) in appropriate variants.

Supports the Capacitive Sensing Module (CSM) in appropriate variants.

Internally generated processor clock for performance. Event timing accurate to one clock period.

Provides internal consistency checks on code (e.g. execution of invalid op-codes, illegal memory accesses, stack overflow checking, etc.).

Fully integrated in to the VSM source level debugging system.

Fully integrated into the Proteus Diagnostic Control System.

Enhanced PIC16 core architecture including Program and Data memory extentions, 14 new instructions, linear mapping, enhanced indirect addressing and automatic interrupt context save.

Pontos negativos:

The external programming interface (PGC/PGD pins) are not modelled.

Brown-out detection is not modelled.

The new I2C features (SSPCON3 register) are not supported. Only bits PCIE, SCIE, SBCDE and BOEN are modelled. I2C will work in legacy mode only for remaining bits.

HFINTOSC as CLC1 input is not supported for efficiency reasons.

For efficiency reasons the CSM analog oscillator is not modeled. The capacitance on the CPSx inputs is computed more efficiently, though.

Família 18F:

PIC18F242, PIC18F252, PIC18F442, PIC18F452, PIC18F248, PIC18F258

PIC18F448, PIC18F458, PIC18F1220, PIC18F1320, PIC18F2220, PIC18F2331

PIC18F2320, PIC18F2410, PIC18F2420, PIC18F2431, PIC18F2510, PIC18F2515

PIC18F2520, PIC18F2525, PIC18F2610, PIC18F2620, PIC18F4220, PIC18F4320

PIC18F4331, PIC18F44J10, PIC18F45J10, PIC18F24J10, PIC18F25J10, PIC18F4410

PIC18F4420, PIC18F4431, PIC18F4510, PIC18F4515, PIC18F4520, PIC18F4525

PIC18F4610, PIC18F4620, PIC18F6520, PIC18F6585, PIC18F8585, PIC18F8680

PIC18F6620, PIC18F6680, PIC18F6720, PIC18F8520, PIC18F8620, PIC18F8720

PIC18F8722, PIC18F8627, PIC18F8622, PIC18F8527, PIC18F6722, PIC18F6627

PIC18F6622, PIC18F6527, PIC18F6628, PIC18F6723, PIC18F23K20, PIC18F24K20

PIC18F25K20, PIC18F26K20, PIC18F43K20, PIC18F44K20, PIC18F45K20, PIC18F46K20

PIC18F2450, PIC18F2455, PIC18F2458, PIC18F2550, PIC18F2553, PIC18F4450

PIC18F4455, PIC18F4458, PIC18F4550, PIC18F4553, PIC18F13K50, PIC18F14K50

PIC18LF13K50, PIC18LF14K50, PIC18F2480, PIC18F2580, PIC18F4480, PIC18F4580

PIC18F2585, PIC18F2680, PIC18F4585, PIC18F4680, PIC18F2682, PIC18F2685

PIC18F4682, PIC18F4685, PIC18F1230, PIC18F1330, PIC18F2423, PIC18F2523

PIC18F4423, PIC18F4523, PIC18F6390, PIC18F6490, PIC18F8390, PIC18F8490

PIC18F6393, PIC18F6493, PIC18F8393, PIC18F8493, PIC18F63J90, PIC18F64J90

PIC18F65J90, PIC18F83J90, PIC18F84J90, PIC18F85J90, PIC18F13K22, PIC18F14K22

PIC18LF13K22, PIC18LF14K22, PIC18F2221, PIC18F2321, PIC18F4221, PIC18F4321

PIC18F23K22, PIC18F24K22, PIC18F25K22, PIC18F26K22,PIC18LF23K22, PIC18LF24K22

PIC18LF25K22, PIC18LF26K22, PIC18F43K22, PIC18F44K22, PIC18F45K22, PIC18F46K22

PIC18LF43K22, PIC18LF44K22, PIC18LF45K22, PIC18LF46K22, PIC18F65K22, PIC18F66K22

PIC18F67K22, PIC18F85K22, PIC18F86K22, PIC18F87K22

PIC18F24J50, PIC18F25J50, PIC18F26J50, PIC18LF24J50, PIC18LF25J50, PIC18LF26J50

PIC18F44J50, PIC18F45J50, PIC18F46J50, PIC18LF44J50, PIC18LF45J50, PIC18LF46J50

PIC18F26J53, PIC18F27J53, PIC18LF26J53, PIC18LF27J53

PIC18F46J53, PIC18F47J53, PIC18LF46J53, PIC18LF47J53

PIC18F26J13, PIC18F27J13, PIC18LF26J13, PIC18LF27J13

PIC18F46J13, PIC18F47J13, PIC18LF46J13, PIC18LF47J13

Pontos Positivos:

Fully simulates the entire instruction set.

Supports all port and other I/O pin operations.

Supports all timers including watchdog timer, sleep mode and wake-up from sleep.

Supports Deep Sleep mode including independent watchdog timer and wake up from WDT, RTCC, ULPWM, INT0 and MCRL.

Supports all Capture-Compare-PWM (CCP) modules in all modes and ECCP modules.

Supports Parallel Slave Port (PSP) module on appropriate devices.

Supports Parallel Master Port (PMP) module on appropriate devices.

Supports MSSP in both the SPI mode and the I2C master and slave modes.

Supports Analogue-to-Digital Conversion (ADC) module inc. support for voltage reference pins.

Supports Analogue Comparator modules inc. support for internal and external voltage references.

Supports CTMU, Charge Time Measurement Unit. All modes are simulated.

Supports ULPWU, Ultra low-power wake-up input.

Supports REFO, Reference Clock Output.

Supports RTCC, Real-Time Clock and Calendar.

Supports SRLatch module.

Supports USART in all modes and EUSART for appropriate variants.

Supports Universal Serial Bus (USB) on appropriate devices.

Supports internal code and data EEPROM memory inc. code protection and data persistence.

Supports Peripheral Pin Select (PPS) on appropriate devices.

Supports Open-Drain Outputs capability on appropriate devices.

Supports all interrupt modes.

Event timing accurate to one clock period.

Provides internal consistency checks on code (e.g. execution of invalid op-codes, illegal memory accesses, stack overflow checking, etc.).

Fully integrated in to the VSM source level debugging system.

Fully integrated into the Proteus Diagnostic Control System.

Pontos Negativos:

The External Memory Interface (EMI) of devices such as the PIC18F8X20 is not modelled. These devices can only be modelled when the PMx configuration bits select the Microcontroller Mode (MC) mode of operation. Specifically, the Microprocessor Mode (MP), Microprocessor with Boot Block Mode (MPBB) and Extended Microcontroller Mode (EMC) modes are not supported.

Power Managed Modes is not modelled. Specifically, the use of IDLEN and SCS/SCSx bits in the OSCCON register to switch oscillator sources and the behaviour of the SLEEP command is not modelled. The SLEEP command always puts the processor in to full sleep mode. This limitation is largely due to poor documentation on how the power managed modes actually affect peripherals.

Brown-out detection and High-Low Voltage Detect (HLVD) is not modelled.

RELEASE bit effects and Brown-out wakeup from Deep Sleep mode are not modelled.

The Internal/External Switch Over (IESO configuration bit) and the Fail Safe Clock Monitor (FSCM configuration bit) are not modelled.

The ECAN module of the PIC18F6680 and PIC18F6685 is not currently modelled.

The SPP (Streaming Parallel Part) of the USB variants is not currently modelled.

Isochronous USB transactions in the USB variants is not currently modelled.

The external programming interface (PGC/PGD pins) are not modelled.

The DMA features for SPI2 PGD pins are not modelled.

Família 24F:

PIC24FJ32GA002, PIC24FJ32GA004, PIC24FJ48GA002, PIC24FJ48GA004

PIC24FJ64GA002, PIC24FJ64GA004, PIC24FJ16GA002, PIC24FJ16GA004

PIC24FJ64GA006, PIC24FJ96GA006, PIC24FJ128GA006, PIC24FJ64GA008

PIC24FJ96GA008, PIC24FJ128GA008, PIC24FJ64GA010, PIC24FJ96GA010

PIC24FJ128GA010, PIC24F04KA200, PIC24F04KA201, PIC24F08KA101

PIC24F16KA101, PIC24F08KA102, PIC24F16KA102

PIC24FJ64GA106, PIC24FJ128GA106, PIC24FJ192GA106, PIC24FJ256GA106

PIC24FJ64GA108, PIC24FJ128GA108, PIC24FJ192GA108, PIC24FJ256GA108

PIC24FJ64GA110, PIC24FJ128GA110, PIC24FJ192GA110, PIC24FJ256GA110

PIC24FJ32GA102, PIC24FJ64GA102, PIC24FJ32GA104, PIC24FJ64GA104

PIC14FJ32GA102, PIC24FJ64GA102, PIC24FJ32GA104, PIC24FJ64GA104

Pontos Positivos:

Supports the entire instruction set.

Supports all port and other I/O pin operations.

Supports all timers including watchdog timer, sleep mode and wake-up from sleep.

Supports both Capture-Compare and PWM modules in all modes.

Supports Parallel Master Port (PMP) module including legacy PSP modes.

Supports all serial communication peripherals including SPI, I2C and UART.

Supports Analogue-to-Digital Conversion (ADC) module including support for voltage reference pins.

Supports Analogue Comparator modules including support for internal and external voltage references.

Supports the CTMU (Charge Time Measurement Unit) features.

Supports Real Time Clock including automatic initialisation from the PC time.

Supports 16-bit Programmable Cyclic Redundancy Check (CRC-16) Generator for appropriate variants.

Supports all interrupt modes including interrupt priorities.

Support for the Peripheral Pin Select module on low pincount devices.

Support for extended instruction set for appropriate variants.

Support for 256 words (512 bytes) EEPROM for appropriate variants.

Provides internal consistency checks on code (e.g. execution of invalid op-codes, illegal memory accesses, stack overflow checking, etc.).

Fully integrated in to the VSM source level debugging system.

Fully integrated into the Proteus Diagnostic Control System.

Pontos Negativos:

The following "core" registers are either not modelled at all. Functionality enabled by these registers is therefore not available: DISICNT, ODCx, CLKDIV, OSCTUN, PMDx.

The OSCCON register not modelled except for the SOSCEN bit (which must be set to enable the secondary oscillator for use by either timer 1 or the Real Time Clock Module)

Brown-out detection is not modelled.

The A/D converted Cad capacitance is not modelled. Whether the effects of Cad have to be taken into the account for CTMU calibration purposes then an external capacitor must be used.

The SPI modules do not currently support either "enhanced" mode (FIFO buffering) or "framing" modes (essentially, any feature enabled via SPIxCON2).

The 32-bit Programmable Cyclic Redundancy Check (CRC-32) Generator is not modelled yet.

Família 33F:

dsPIC33FJ12GP201, dsPIC33FJ12GP202, dsPIC33FJ32GP202

dsPIC33FJ32GP204, dsPIC33FJ16GP304, dsPIC33FJ12MC201

dsPIC33FJ12MC202, dsPIC33FJ32MC202, dsPIC33FJ32MC204

dsPIC33FJ16MC304

Pontos Positivos:

Supports simulation of the entire instruction set.

Supports all port and other I/O pin operations.

Supports all timers including watchdog timer, sleep mode and wake-up from sleep.

Supports both Capture-Compare and PWM modules in all modes.

Supports Parallel Master Port (PMP) module including legacy PSP modes.

Supports all serial communication peripherals including SPI, I2C and UART.

Supports Analogue-to-Digital Conversion (ADC) module including support for voltage reference pins.

Supports Analogue Comparator modules including support for internal and external voltage references.

Supports Real Time Clock including automatic initialisation from the PC time.

Supports all interrupt modes including interrupt priorities.

Support for extended instruction set for appropriate variants.

Provides internal consistency checks on code (e.g. execution of invalid op-codes, illegal memory accesses, stack overflow checking, etc.).

Fully integrated in to the VSM source level debugging system.

Fully integrated into the Proteus Diagnostic Control System.

Pontos Negativos:

The FOSCEL, FOSCEL, CLKDIV and OSCTUN bits/registers are not supported.

Loop back and irDA modes are not currently supported.

The SPI modules do not currently support either "enhanced" mode (FIFO buffering) or "framing" modes (essentially, any feature enabled via SPIxCON2).

The register PMDx effects are not modelled.

Brown out detection is not currently modelled.

Quadrature encode interface - bit QEI1CON Stop in Idle mode not modelled.

Motor Control PWM - bit PxTCON, PWM Time Base Stop in Idle Mode not modelled.

ADC with SS&H - only the variant up to 13 analog input pin and without DMA is supported at moment.

Falou

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