PIC Utilizando a placa simulada PICGenios com microcontrolador PIC18F4550

Tais Pereira da Silva · 23 de agosto de 2022

Utilizando a placa simulada PICGenios com microcontrolador PIC18F4550 e o compilador XC8 elabore um firmware que:

- Tenha o botão RB3 para adicionar uma unidade a PORTD;

- Tenha o botão RB4 para subtrair uma unidade a PORTD.

Lembre-se de ativar o pull-up interno para a PORTB

como ficaria esses 3?

/* ######################################################################## PICsim - PIC simulator http://sourceforge.net/projects/picsim/ ######################################################################## Copyright (c) : 2015 Luis Claudio Gambôa Lopes This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. For e-mail suggestions : [email protected] ######################################################################## */ #ifndef CONFIG_4550_H #define CONFIG_4550_H #ifdef __cplusplus extern "C" { #endif // PIC18F4550 Configuration Bit Settings // #pragma config statements should precede project file includes. // Use project enums instead of #define for ON and OFF. // CONFIG1L #pragma config PLLDIV = 2 // PLL Prescaler Selection bits (Divide by 2 (8 MHz oscillator input)) #pragma config CPUDIV = OSC2_PLL3// System Clock Postscaler Selection bits ([Primary Oscillator Src: /2][96 MHz PLL Src: /3]) #pragma config USBDIV = 2 // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes from the 96 MHz PLL divided by 2) // CONFIG1H #pragma config FOSC = HS // Oscillator Selection bits (HS oscillator (HS)) #pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled) #pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled) // CONFIG2L #pragma config PWRT = ON // Power-up Timer Enable bit (PWRT enabled) #pragma config BOR = OFF // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software) #pragma config BORV = 3 // Brown-out Reset Voltage bits (Minimum setting) #pragma config VREGEN = OFF // USB Voltage Regulator Enable bit (USB voltage regulator disabled) // CONFIG2H #pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit)) #pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768) // CONFIG3H #pragma config CCP2MX = ON // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1) #pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset) #pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation) #pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled) // CONFIG4L #pragma config STVREN = OFF // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset) #pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled) #pragma config ICPRT = OFF // Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit (ICPORT disabled) #pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode)) // CONFIG5L #pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected) #pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected) #pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected) #pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected) // CONFIG5H #pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected) #pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is not code-protected) // CONFIG6L #pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected) #pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected) #pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected) #pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected) // CONFIG6H #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected) #pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected) #pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is not write-protected) // CONFIG7L #pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks) #pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks) #pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks) #pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks) // CONFIG7H #pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks) #ifdef __cplusplus } #endif #endif /* CONFIG_4550_H */

aphawk · 23 de agosto de 2022

@Tais Pereira da Silva ,

Poste o "esqueleto" do programa, com a inicialização informando também o clock, as chamadas para as bibliotecas, etc, assim p pessoal pode te dar uma ajuda ok ?

Paulo

.if · 29 de agosto de 2022

Em 23/08/2022 às 16:47, Tais Pereira da Silva disse:

- Tenha o botão RB3 para adicionar uma unidade a PORTD;

- Tenha o botão RB4 para subtrair uma unidade a PORTD.

Lembre-se de ativar o pull-up interno para a PORTB

Programa RB3 e RB4 como entrada.. algo como:

TRISB3=TRISB4=1;

Programa PORTD como saída.. algo como:

TRISD=0x00;

Incremente/decremente com algo como:

for(;;)
{
if (!RB3) PORTD++;
if (!RB4) PORTD--;
while (!RB3 && !RB4);
}

Veja no d.s. do mc qual registro é responsável pelo pullup e depois no seu compilador como fazer o acesso à ele.

Parece que seu fonte apenas configura os fuses. No mplabx tem uma maneira manêra de configurar:

window->target memory view->configuration bits

Curiosamente não está a funcionar na IDE do

https://www.microchip.com/en-us/tools-resources/develop/mplab-xpress

Estou com preguiça de perguntar na microchip. Se você (caro leitor) algum dia precisar, considere perguntar pra eles e nos reportar o resultado, ok?

edit... Sua colagem incomoda olhos programadores. Use o botão code...

#ifndef CONFIG_4550_H #define CONFIG_4550_H 
#ifdef __cplusplus extern "C" { #endif //
// PIC18F4550 Configuration Bit Settings //
#pragma config statements should precede project file includes. // Use project enums instead of #define for ON and OFF. 
// CONFIG1L 
#pragma config PLLDIV = 2 // PLL Prescaler Selection bits (Divide by 2 (8 MHz oscillator input)) 
#pragma config CPUDIV = OSC2_PLL3// System Clock Postscaler Selection bits ([Primary Oscillator Src: /2][96 MHz PLL Src: /3]) 
#pragma config USBDIV = 2 // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes from the 96 MHz PLL divided by 2) // CONFIG1H 
#pragma config FOSC = HS // Oscillator Selection bits (HS oscillator (HS)) 
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled) 
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled) 
// CONFIG2L 
#pragma config PWRT = ON // Power-up Timer Enable bit (PWRT enabled) 
#pragma config BOR = OFF // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software) 
#pragma config BORV = 3 // Brown-out Reset Voltage bits (Minimum setting) 
#pragma config VREGEN = OFF // USB Voltage Regulator Enable bit (USB voltage regulator disabled) 
// CONFIG2H 
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit)) 
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768) 
// CONFIG3H 
#pragma config CCP2MX = ON // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1) 
#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset) 
#pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation) 
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled) //
// CONFIG4L 
#pragma config STVREN = OFF // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset) 
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled) #pragma config ICPRT = OFF 
// Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit (ICPORT disabled) 
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode)) 
// CONFIG5L 
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected) 
#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected) 
#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected) 
#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected) 
// CONFIG5H 
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected) 
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is not code-protected) 
// CONFIG6L 
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected) 
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected) 
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected) 
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected) 
 CONFIG6H #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected) 
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected) 
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is not write-protected) 
// CONFIG7L 
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks) 
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks) 
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks) 
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks) 
//CONFIG7H 
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks) 
#ifdef __cplusplus } #endif #endif /* CONFIG_4550_H */